Analog data by its very nature involves signals having dynamic ranges that change under varying conditions. The process of measuring such analog signals presents at least two problems. One problem is maintaining sufficient range to avoid artificially limiting the apparent dynamic range of the signal (e.g., “clipping”). Another problem is avoiding so large a dynamic range in the detector that the apparent signal uses only a fraction of the available range, thereby diminishing detector precision and sensitivity.
In particular, when the analog signal is to be converted to digital format for subsequent data processing, both problems individually pose significant risks in data analysis. Clipping introduces random and unknowable artifacts beyond the well-known artifacts which are introduced by converting a continuous (analog) signal to a discrete (digital) signal. Loss of sensitivity results in poor signal-to-noise ratio (“SNR”) and associated difficulties in data interpretation.
A definition that relates accuracy and precision is given by Weisstein at http://mathworld.wolfram.com/Accuracy.html. The definition states that “the accuracy of a number x is given by the number of significant decimal (or other) digits to the right of the decimal point in x, [while] the precision of x is the total number of significant decimal (or other) digits.”
Auto-ranging A/D data converters are known in which the digital output varies in steps, typically differing by one order of magnitude (e.g., using “floating point” amplifiers). In data converters comprising floating point amplifiers, which are exemplified by auto-ranging digital meters that provide absolute measurements, an analog signal is applied to the converter. The signal is measured and a digital signal proportional to the analog signal is generated. The digital signal is displayed in a decimal format, in which the auto-ranging capability changes the display output by one order of magnitude as the analog signal increases or decreases in magnitude, so as to display a substantially constant number of significant digits so long as the signal is within a defined range. In order to increase the apparent sensitivity of the meter, an increase in one decimal digit of output is required (e.g., from a three-and-one-half decimal digit output to a four-and-one-half decimal digit output, for example). However, an increase in a factor of ten in sensitivity requires an increase of four bits of data conversion capability, and the four bits are not optimally utilized in that only 10 of 16 possible values represented by four bits are ever used. There has been appreciable improvement in A/D (and digital-to-analog, or D/A) data conversion technology. However, there remain limits on how many bits of resolution are available in commercially available A/D converters, in particular at a reasonable price.
Various implementations of A/D converters providing automatic changes in range and resolution are described in the prior art. For example, U.S. Pat. No. 4,815,118, issued Mar. 21, 1989, U.S. Pat. No. 5,363,055, issued Nov. 8, 1994, and U.S. Pat. No. 6,392,584, issued May 21, 2002, each discloses a different approach to scaling the input signal to the A/D converter using an auto-ranging means. International Patent Application No. PCT/US1997/23562, published on Jul. 2, 1998 under International Publication Number WO 98/28853, also discloses an auto-ranging A/D converter in which an input analog signal is measured, and the signal gain is reset to that future signals going into the A/D converter are accommodated.
In U.S. Pat. No. 5,329,281, issued Jul. 12, 1994, a circuit is disclosed that provides a “programmable tradeoff between bandwidth and resolution” in an A/D converter circuit. U.S. Pat. No. 5,270,898, issued Dec. 14, 1993, U.S. Pat. No. 5,525,895, issued Jun. 11, 1996, and U.S. Pat. No. 5,751,234, issued May 12, 1998, each discloses a monolithic IC that includes an on-board microprocessor, an A/D converter subsystem, and circuitry to improve the resolution of the A/D converter subsystem, including current and voltage ranging amplifiers for ranging analog input voltage and current signals.
Still another solution is described in U.S. Pat. No. 3,855,589, issued Dec. 17, 1974 to Solender, which discloses the use of a plurality of reference voltages that are generated in equal logarithmic amplitude steps. Solender applies different ones of the logarithmically spaced reference voltages during a measurement of a signal, thereby varying the quantization unit of the measurement during the course of the measurement.
A further solution is described in U.S. Pat. No. 4,823,130, issued Apr. 18, 1989 to Wright et al. Wright addresses the problem of reading the position of a butterfly valve, which moves over a range of zero degrees to 90 degrees, thereby controlling a flow of air. Wright discloses a method of extracting N+X bits of resolution from an N-bit A/D converter (where X=0, 1, or 2) in making a measurement of the absolute value of a magnitude M (e.g., an angular displacement) where the resolution changes according to angular ranges. This is a variant on conditioning an input signal by a factor of powers of 2. Wright discloses making a first analog-to-digital conversion of the magnitude M using a reference voltage difference of Vref applied to the reference voltage terminals of an A/D converter, observing a value X representing the number of consecutive zero bits that appear in the most significant bit positions of the converted value, and if X is not zero, reducing Vref by dividing with 2X to produce a new reference voltage difference Vref/2X, applying Vref/2X as the new reference voltage difference, and extracting N+X bits of resolution by performing a second conversion of the magnitude M. However, one shortcoming of this method is the abrupt change in resolution that occurs as the number of bits of precision changes, which occurs in Wright at angles of 22.5 and 45 degrees. For example, according to the disclosure of Wright, the precision of a reading at 22.4 degrees is 10 bits, while the precision of a reading at 22.6 degrees is only 9 bits.
U.S. Pat. No. 4,990,913, issued on Feb. 5, 1991 to Beauducel, describes an A/D system that uses a pre-amplifier to scale an input signal and a variable reference voltage selected from N fixed voltages, the reference voltage being applied to the A/D during conversion of the signal. The result is represented by the output of the A/D and a gain G indicative of the selected reference voltage. As an example, the N fixed reference voltages can be a stabilized voltage divided by a power of 2. The value obtained from the A/D is a mantissa, and the gain G is an exponent whereby the digital value is expressed.
U.S. Pat. No. 5,028,926, issued on Jul. 2, 1991 to Tokuhiro, describes a successive approximation A/D converter that uses a variable reference voltage in order to provide more bits of precision than the A/D converter comprises. Tokuhiro describes a series of reference voltages that differ by powers of 2, which are generated from a single fixed full scale voltage. The use of multiple clock signals to apply the various powers of the reference voltage allow attainment of a number of bits of resolution that is larger than the number of bits provided by the A/D.
U.S. Pat. No. 5,995,032, issued on Nov. 30, 1999 to Gandy, describes an A/D converter that comprises a fixed resistor ladder and a variable voltage element in series with the fixed resistor ladder for biasing the fixed resistor ladder between two voltages, Vtop and Vbottom, so as to control the reference voltages applied to an A/D converter.
U.S. Pat. No. 5,995,036, issued on Nov. 30, 1999 to Nise et al., describes a sigma A/D converter circuit that provides output having a sign bit, mantissa bits, and exponent bits. Nise describes the circuit as a modulator followed by a decimator followed by a normalizer with a programmable gain control feeding signals from the output of the normalizer to the inputs of the modulator and the decimator.
Each of the disclosed circuits provide solutions that have one or more disadvantages, including limited range capability, abrupt changes in sensitivity and/or resolution, and non-optimized resolution and sensitivity. Accordingly, there is a need for an analog-to digital converter that provides auto-ranging capability with optimized least-significant-bit sensitivity and that avoids the disadvantages of the prior art circuits.